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M62382FP
5 V Type 12-bit 4ch Composite Multiplying D/A Converter
REJ03D0882-0300 Rev.3.00 Mar 25, 2008
Description
The M62382FP is a semiconductor integrated circuit of 5 V CMOS structure with 12-bit 4 channels of built-in multiplying D/A converters and 8-bit 8 channels of built-in multiplying D/A converters. 8-bit D/A converters, when used in combination with 12-bit D/A converters, can operate in a wider range. Parallel data input under the 2 modes (A, B) of channel assignment allows for easier usage.
Features
* * * * Built-in low power 12-bit 4 channels D/A converters 8-bit D/A converter with buffer making full swing between VCC and GND. 2 modes (A, B) of channel assignment Zero level function Built-in function of retaining arbitrary assigned data in 12-bit D/A converter. In normal use, output voltage can be switched to the voltage corresponding to the formerly assigned data by the setting of Z01, making it possible to calibrate the data (output voltage value).
Application
High precision measurement equipments such as memory testers, industrial measurement equipments, medical equipments, standard equipments in general
REJ03D0882-0300 Rev.3.00 Mar 25, 2008 Page 1 of 10
M62382FP
Block Diagram
Z00 Z01 0-level 12-bit D/A register 12 D11 D10 D09 D08 D07 D06 D05 D04 D03 D02 D01 D00 DA-selector 24 8 12 12 12 VrefU (12DA) 1
for 12-bit D/A
12-bit D/A C
DAout (12DA) 1
12-bit register 8-bit register
VrefL (12DA) 1 VrefU (8DA1) 1
LD A04 A03 A01 A00 A08 A07 A06 A05 A02 2-4 8
for offset 8-bit D/A
8-bit D/A C for offset
0 dB
DAout (8DA1) 1
8-bit register for gain 8-bit D/A 3
VrefL (8DA1) 1 VrefU (8DA2) 1
8-bit D/A C for gain
0 dB
DAout (8DA2) 1
33
VrefL (8DA2) 1 24
CH1 D/A C
VrefU (12DA) 2 DAout (12DA) 2 VrefL (12DA) 2 VrefU (8DA1) 2 DAout (8DA1) 2 VrefL (8DA1) 2 VrefU (8DA2) 2 DAout (8DA2) 2 VrefL (8DA2) 2 VrefU (12DA) 3 DAout (12DA) 3 VrefL (12DA) 3 VrefU (8DA1) 3 DAout (8DA1) 3 VrefL (8DA1) 3 VrefU (8DA2) 3 DAout (8DA2) 3 VrefL (8DA2) 3 VrefU (12DA) 4 DAout (12DA) 4 VrefL (12DA) 4 VrefU (8DA1) 4 DAout (8DA1) 4 VrefL (8DA1) 4 VrefU (8DA2) 4 DAout (8DA2) 4 VrefL (8DA2) 4
28
CH2 D/A C
24
28
CH3 D/A C
VDD VDD VSS VSS VCC VCC GND GND
28 24
CH4 D/A C
REJ03D0882-0300 Rev.3.00 Mar 25, 2008 Page 2 of 10
M62382FP
GND
D00
D11
D01
D02
D03
D04
D05
D06
D07
D08
D09
D10
VSS NC NC NC NC NC NC NC NC NC
96 88 77 98 97 95 94 93 92 91 90 89 87 86 85 84 83 82 81 80 79 78 76
75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51
Pin Arrangement
NC
99 100
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25
NC
VrefL (12DA) 1 DAout (12DA) 1 VrefU (12DA) 1 NC VrefL (8DA2) 1 DAout (8DA2) 1 VrefU (8DA2) 1 NC VrefL (8DA1 )1 DAout (8DA1) 1 VrefU (8DA1) 1 GND NC GND VrefU (8DA1) 2 DAout (8DA1) 2 VrefL (8DA1) 2 NC VrefU (8DA2) 2 DAout (8DA2) 2 VrefL (8DA2) 2 NC VrefU (12DA) 2 DAout (12DA) 2 VrefL (12DA) 2
26 27
VrefL (12DA) 4 DAout (12DA) 4 VrefU (12DA) 4 NC VrefL (8DA2) 4 DAout (8DA2) 4 VrefU (8DA2) 4 NC VrefL (8DA1) 4 DAout (8DA1) 4 VrefU (8DA1) 4 GND NC GND VrefU (8DA1) 3 DAout (8DA1) 3 VrefL (8DA1) 3 NC VrefU (8DA2) 3 DAout (8DA2) 3 VrefL (8DA2) 3 NC VrefU (12DA) 3 DAout (12DA) 3 VrefL (12DA) 3
REJ03D0882-0300 Rev.3.00 Mar 25, 2008 Page 3 of 10
M62382FP (Top view)
33 28 29 30 31 32 34 35 36 37 38 39 40 41
Outline: PLQP0100KB-A (100P6Q-A)
44 42 43 45 46
47
48
49
50
LD
NC
NC
NC
NC
NC
NC
NC
NC
VSS
VSS
VCC
VDD
VCC
Z00
Z01
A00
A01
A02
A03
A04
A05
A06
A07
A08
M62382FP
Pin Description
Pin No. 1, 25, 51, 75 2, 24, 52, 74 3, 23, 53, 73 5, 9, 17, 21, 55, 59, 67, 71 6, 10, 16, 20, 56, 60, 66, 70 7, 11, 15, 19, 57, 61, 65, 69 27, 49 12, 14, 62, 64, 78 47 28, 48, 98 30, 31, 33, 34, 36, 37, 39, 40, 42 79, 81, 82, 84, 85, 87, 89, 91, 92, 94, 95, 97 43 46 45 4, 8, 13, 18, 22, 29, 32, 35, 38, 41, 44, 50, 54, 58, 63, 68, 72, 76, 77, 80, 83, 86, 88, 90, 93, 96, 99, 100 Pin Name VrefL (12) DAout (12) VrefU (12) VrefL (8) DAout (8) VrefU (8) VCC GND VDD VSS A00 to A08 D00 to D11 LD Z00 Z01 NC Function 12-bit D/A converter lower reference voltage input terminal 12-bit D/A converter output terminal 12-bit D/A converter upper reference voltage input terminal 8-bit D/A converter lower reference voltage input terminal 8-bit D/A converter output terminal 8-bit D/A converter upper reference voltage input terminal Analog power supply terminal Analog GND terminal Digital power supply terminal Digital GND terminal Address terminal D/A data terminal D/A LD terminal Zero level data assignment terminal Zero level data load terminal Non-connection
Absolute Maximum Ratings
Item Digital supply voltage Analog supply voltage Digital input voltage D/A reference voltage D/A output voltage Operating temperature Storage temperature Symbol VDD VCC VDIN Vref VDAout Topr Tstr Ratings -0.3 to +7.0 -0.3 to +7.0 -0.3 to VDD + 0.3 7.0 -0.3 to VDD + 0.3 7.0 -0.3 to VDD + 0.3 7.0 -20 to +85 -40 to +125 Unit V V V V V C C
REJ03D0882-0300 Rev.3.00 Mar 25, 2008 Page 4 of 10
M62382FP
Electrical Characteristics
(VDD = VCC = 5 V, VSS = GND (= 0 V), VrefU = VCC, VrefL = GND, Ta = -20 to +85C, unless otherwise noted.)
Item Digital supply current Input leak current Input capacitive load Symbol IDD IILK CIN Min -- -10 -- Limits Typ -- -- -- Max 3.0 +10 1.2 Unit mA A pF Conditions fLD = 1 MHz, VDIN = VSS, or VDD VDIN = VSS to VDD
(VDD = VCC = 5 V, VSS = GND (= 0 V), VrefU = VCC, VrefL = GND, Ta = -20 to +85C, unless otherwise noted.)
Item Analog supply current Reference current for D/A converter (U to L) Symbol ICC Iref Min -- -- -- Buffer amplifier output drive range Output resistance Differential nonlinearity error Nonlinearity error Zero code error Full code error Temperature coefficient of nonlinearity error Cross talk between the channels Power supply rejection ratio Temperature coefficient of D/A output Settling time of 12-bit D/A Settling time of 8-bit D/A IOA RO SDL SNL SZERO SFULL NL/t CT PSRR TCo tSTDA tstDA 1.5 -- -- -1.5 -1.0 -2.0 -1.0 -3.0 -3.0 -- -- -- -- -- -- -- -- Limits Typ 1.6 0.7 0.1 -- 2.2 10 -- -- -- -- -- -- -- 75 65 65 55 20 1.4 70 Max 6.0 2.0 0.4 -- -- -- +1.5 +1.0 +2.0 +1.0 +3.0 +3.0 0.05 -- -- -- -- -- -- -- Unit mA mA mA mA k LSB LSB LSB LSB LSB/C dB dB ppm/C s s Without load (IOA = 0 mA) Until output takes 1/2 LSB of the final value Conditions D/A output = 1/2 MSB 12-bit D/A D/A data for maximum current of D/A reference, each circuit current from 8-bit D/A VrefU to VrefL Upper side saturation voltage = 0.3 V Lower side saturation voltage = 0.3 V 12-bit D/A: R-2R ladder output 8-bit D/A: Buffer amplifier output 12-bit D/A VrefU = 5.0 V, VrefL = 0.0 V Ta = 25C 8-bit D/A 12-bit D/A VrefU = 5.0 V, VrefL = 0.0 V Ta = 25C 8-bit D/A VrefU = 5.0 V, VrefL = 0.0 V Ta = 25C VrefU = 5.0 V, VrefL = 0.0 V Ta = 25C VrefU = 5.0 V, VrefL = 0.0 V SNL 12-bit D/A / 60C (Ta = 25 to 85C) 12-bit D/A Vin = -10 dBm f = 100 Hz to 1 kHz 8-bit D/A 12-bit D/A 8-bit D/A VCCin = VCC - 10 dBm f = 100 Hz to 1 kHz
REJ03D0882-0300 Rev.3.00 Mar 25, 2008 Page 5 of 10
M62382FP
Recommended Operating Condition
(Ta = 25 to 75C)
Item Analog power supply voltage Digital power supply voltage H side D/A reference voltage L side D/A reference voltage H level digital input voltage L level digital input voltage D/A data set up time Address data set up time D/A data hold time Address data hold time Load signal H level hold time Z00 signal H level hold time Symbol VCC VDD VrefH VrefL VIH VIL tDDCH tADCH tDCHD tACHD tLDH tZSH Min 4.5 4.5 VCC - 0.5 GND 2 GND 10 150 tLDH + 35 tLDH + 10 100 15 Limits Typ 5.0 5.0 -- -- -- -- -- -- -- -- -- -- Max 5.5 5.5 VCC 0.5 VDD 0.8 -- -- -- -- -- -- Unit V V V V V V ns ns ns ns ns ns Conditions
Driving 12-bit and 8-bit D/A converters at same time Driving 12-bit and 8-bit D/A converters at same time Driving 12-bit and 8-bit D/A converters at same time Driving 12-bit and 8-bit D/A converters at same time Driving 12-bit and 8-bit D/A converters at same time
Timing Chart
tDDCH tDCHD
D/A data (12-bit: D00 to D11)
D0 D/A data (D0)
D1 D1
tADCH tACHD
D2 D2
Address data (9-bit: A00 to A08)
A0 Address data (A0)
tLDH
A1 A1
A2 A2
Load signal (LD)
tSTDA
DAout (12DA) n (CHn 12-bit DAout)
DAout (Old data)
DAout (D0 data)
tstDA
DAout (D2)
DAout (8DA) m (CHm 8-bit DAout)
DAout (Old data)
DAout (D1 data)
REJ03D0882-0300 Rev.3.00 Mar 25, 2008 Page 6 of 10
M62382FP
Zero Level Setting (input/output): Z00, Z01
tDDCH Data for D/A converter (D00 to D11: 12-bit data) tDCHD Zero level output value is set by 12-bit data. Data for zero level setting tZSH Set data to be memorized Zero level output and normal mode output can be swiched with each other. Zero level load signal (Z01) D/A output zero level at signal rise, D/A output recovered at signal fall. Back to original output value after recovery. 12-bit DAC output DAout (12DA) (12-bit DAout) DAout (normal output)
Zero level setting signal (Z00) Data sampling when signal rises, data retained when signal falls.
tSTDA
tSTDA DAout (normal output)
DAout (zero level output)
Digital Format
1. Channel Select Setting (A01, A02)
Setting Select CH1 select CH2 select CH3 select CH4 select A01 0 0 1 1 A00 0 1 0 1
2. Channel Assign Mode Setting (A02)
Channel Assign Mode Setting A channel assign mode B channel assign mode A02 0 1
3. 8-bit D/A Converter Select Setting (A03)
8-bit D/A Converter Select Setting D/A select for offset D/A select for gain A03 0 1
4. D/A Converter Select Setting (A04)
D/A Converter Select Setting 12-bit D/A converter select 8-bit D/A converter select A04 0 1
5. Channel Select Setting B (A05, A06, A07, A08)
Setting Select CH1 select CH2 select CH3 select CH4 select A05 1 0 0 0 A06 0 1 0 0 A07 0 0 1 0 A08 0 0 0 1
12-bit D/A
D00 0 1 0 1 : 0 1 0 1 D01 0 0 1 1 : 0 0 1 1 D02 0 0 0 0 : 1 1 1 1 D03 0 0 0 0 : 1 1 1 1 D04 0 0 0 0 : 1 1 1 1 D05 0 0 0 0 : 1 1 1 1 D06 0 0 0 0 : 1 1 1 1 D07 0 0 0 0 : 1 1 1 1 D08 0 0 0 0 : 1 1 1 1 D09 0 0 0 0 : 1 1 1 1 D10 0 0 0 0 : 1 1 1 1 D11 0 0 0 0 : 1 1 1 1 D/A Output VrefL12 (VrefU12 - VrefL12) / 4096 x 1 (VrefU12 - VrefL12) / 4096 x 2 (VrefU12 - VrefL12) / 4096 x 3 : (VrefU12 - VrefL12) / 4096 x 4092 (VrefU12 - VrefL12) / 4096 x 4093 (VrefU12 - VrefL12) / 4096 x 4094 (VrefU12 - VrefL12) / 4096 x 4095
REJ03D0882-0300 Rev.3.00 Mar 25, 2008 Page 7 of 10
M62382FP 8-bit D/A
D00 0 1 0 1 : 0 1 0 1 D01 0 0 1 1 : 0 0 1 1 D02 0 0 0 0 : 1 1 1 1 D03 0 0 0 0 : 1 1 1 1 D04 0 0 0 0 : 1 1 1 1 D05 0 0 0 0 : 1 1 1 1 D06 0 0 0 0 : 1 1 1 1 D07 0 0 0 0 : 1 1 1 1 D08 -- -- -- -- : -- -- -- -- D09 -- -- -- -- : -- -- -- -- D10 -- -- -- -- : -- -- -- -- D11 -- -- -- -- : -- -- -- -- D/A Output VrefL8 (VrefU8 - VrefL8) / 256 x 1 (VrefU8 - VrefL8) / 256 x 2 (VrefU8 - VrefL8) / 256 x 3 : (VrefU8 - VrefL8) / 256 x 252 (VrefU8 - VrefL8) / 256 x 253 (VrefU8 - VrefL8) / 256 x 254 (VrefU8 - VrefL8) / 256 x 255
8-bit D/A Converter for Reference Voltage Power Supply
VrefU
8-bit DAC
Vout VrefU
VrefL 12-bit DAC VrefU VrefL 8-bit DAC Vout Vout
VrefL
Note:
Arbitrary voltage can be set without the connection to power supply by connecting the output terminal of 8-bit D/A converter with upper reference voltage and lower reference voltage of 12-bit D/A converter.
Ultra High Precision D/A Converter
VrefU
8-bit DAC
Vout
VrefU VrefL 12-bit DAC Vout
VrefL
Note:
By connecting the output terminal of 8-bit D/A converter with the upper reference voltage of 12-bit D/A converter, D/A converter equivalent to 20-bit is configurated to have higher precision configuration. If more minute output variation is needed, 8-bit D/A converter can be utilized for compensation like this.
REJ03D0882-0300 Rev.3.00 Mar 25, 2008 Page 8 of 10
M62382FP
Application Circuit
74
73
72
71
70
68
67
65
64
63
62
61
60
59
58
56
54
53
52
76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100
51
50 49 48 47 46 45 44 43 42 41 40
75
69
66
57
55
M62382FP
10
12
13
14
15
16
17
18
19
20
21
23
24
+
+
+
+
+
+
Caution
This IC has four different kinds of terminals, which are to be applied by constant voltage when used. (VCC, VDD, VrefU, VrefL) D/A converter precision may be worsened when ripple voltage or spike is duplicated on these four terminals. So please be sure to put capacitor between each terminal and GND for stabilized D/A converter operation.
REJ03D0882-0300 Rev.3.00 Mar 25, 2008 Page 9 of 10
25
11
22
1
2
3
4
5
6
7
8
9
+ + +
39 38 37 36 35 34 33 32 31 30 29 28 27 26
+
+
+
+
+
+
M62382FP
Package Dimensions
JEITA Package Code P-LQFP100-14x14-0.50 RENESAS Code PLQP0100KB-A Previous Code 100P6Q-A / FP-100U / FP-100UV MASS[Typ.] 0.6g
HD *1 D
75
51 NOTE) 1. DIMENSIONS "*1" AND "*2" DO NOT INCLUDE MOLD FLASH. 2. DIMENSION "*3" DOES NOT INCLUDE TRIM OFFSET.
76
50
bp b1
HE E
Reference Dimension in Millimeters Symbol
*2
c1
c
Terminal cross section
1 Index mark ZD
25 F
ZE
100
26
A2
A
D E A2 HD HE A A1 bp b1 c c1
c
A1
y e
*3
bp
L L1 Detail F
x
e x y ZD ZE L L1
Min Nom Max 13.9 14.0 14.1 13.9 14.0 14.1 1.4 15.8 16.0 16.2 15.8 16.0 16.2 1.7 0.05 0.1 0.15 0.15 0.20 0.25 0.18 0.09 0.145 0.20 0.125 0 8 0.5 0.08 0.08 1.0 1.0 0.35 0.5 0.65 1.0
REJ03D0882-0300 Rev.3.00 Mar 25, 2008 Page 10 of 10
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